On a 1,000-qubit processor, it’s 3,000 to 5,000 individual cryogenic connections. On the million-qubit systems that fault-tolerant quantum computing will eventually require, the cable count becomes physically impossible to fit inside a refrigerator — regardless of how good the control electronics themselves are.

This is the wiring bottleneck, and it’s arguably the least-discussed constraint in quantum computing, even though it may be the one that decides which architectures actually scale.

Why more qubits means more than proportionally more wires

Dilution refrigerators cool quantum processors to temperatures colder than deep space — down to the millikelvin range — to eliminate the thermal noise that destroys qubit coherence in microseconds. Every wire that runs from room temperature down into that environment is a liability before it’s a solution: each one is a path for heat to leak in, a source of electrical noise, and a mechanical constraint on how densely you can pack a system.

The industry standard approach keeps control and readout electronics at room temperature and pipes signals down through those coaxial cables. It works well at today’s qubit counts. It becomes the limiting factor, not the qubits themselves, as systems scale past a few hundred to a few thousand qubits — refrigerators run out of physical wiring feedthroughs and cooling capacity for the cable heat load long before they run out of space for qubits.

The two ways the industry is responding

Broadly, two strategies have emerged to address this:

Reduce the number of wires per qubit. Room-temperature control system vendors have made real progress here — packing more channels into denser instruments, multiplexing signals, and improving synchronization across larger channel counts. This buys headroom but doesn’t remove the underlying constraint: control electronics that live outside the refrigerator will always need a wire crossing into it.

Move the electronics inside the refrigerator, next to the qubits. This is a fundamentally different approach: instead of shrinking the number of room-temperature wires, eliminate the room-temperature-to-cryogenic crossing for as many functions as possible. Two technology paths are being pursued for this:

• Cryo-CMOS — conventional CMOS circuits, operated at cryogenic temperatures (typically ~3–4K). Research groups at Delft, Intel, and IBM have demonstrated cryo-CMOS chips driving real qubits with fidelities matching room-temperature instruments.

• Single Flux Quantum (SFQ) electronics — superconducting digital logic that operates natively at the same millikelvin temperatures as the qubits themselves, rather than at the warmer 3–4K stage cryo-CMOS typically targets. Because SFQ circuits are superconducting, they dissipate orders of magnitude less power than CMOS at these temperatures, which matters enormously given how little cooling power a dilution refrigerator has at its coldest stage.

Why the coldest stage is the hard part

Not all cryogenic temperatures are equal from an engineering standpoint. A dilution refrigerator might have watts of cooling power available at 4K, but only microwatts at the millikelvin stage where qubits live. That’s why cryo-CMOS solutions typically sit at the warmer 3–4K stage — it’s the highest temperature where conventional CMOS still performs well, and the refrigerator can tolerate the power it draws there. It still leaves a wiring run between the 4K stage and the qubits themselves, just a much shorter one than the original room-temperature run.

Reaching true parity — control and readout electronics operating at the same temperature as the qubits, with no remaining cryogenic wiring crossing at all — requires circuits that use very little power at millikelvin temperatures. This is the specific problem SFQ technology is built to solve, and it’s why it’s treated as a distinct category from cryo-CMOS rather than a variant of it.

What this means for anyone building or buying a quantum system

The wiring bottleneck isn’t a far-off problem — it’s already the binding constraint for any team planning systems in the thousands-of-qubits range, which is where the field is headed within the next few years. Two practical implications:

• Architecture decisions made today determine scalability later. A control architecture that works cleanly at 100 qubits can become the primary obstacle at 1,000, independent of qubit quality. Evaluating a quantum computing roadmap now means asking not just “how good are the qubits” but “what happens to the control electronics at 10x the qubit count.”

• On-chip, at-temperature control is the structural answer, not an incremental one. Denser room-temperature instruments and warmer-stage cryo-CMOS both extend the runway. Only eliminating the cryogenic wiring crossing entirely removes the constraint rather than delaying it.</li>

SEEQC builds SFQ-based control and readout electronics that operate on-chip, at the same millikelvin temperature as the qubits — eliminating the wiring crossing rather than shrinking it. Explore the technology →